Breeding Normalized Postfix Expressions for the Facility Layout Problem

This is a preliminary study in which we use a genetic algorithm (GA) to breed normalized postfix expressions for solving the facility layout problem (FLP). Our technique, initially developed for VLSI floorplanning, simultaneously places rectangles onto a planar site and optimizes area utilization by altering the shapes of facilities that have fixed area but flexible height and width dimensions. We present results for eight small benchmark problems from the literature and obtain improvements on the previously published results for some of the problems. Our method has already proven successful on VLSI problems with many more rectangles than the FLP problems we use in the present study. Identifying suitable test data will enable us to extend to larger problems for the FLP.